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个人简介
吴丽娟,女,博士,教授。2005年于四川大学取得通信与信息系统的硕士学位。2012于电子科技大学取得微电子学与固体电子学的博士学位。2014年7月至今在304am永利集团物理与电子科学学院工作。主持国家自然科学基金项目、湖南省自然科学基金面上项目、湖南省教育厅项目、横向项目等20余项。以第一作者发表A类期刊论文30篇,SCI论文50余篇;出版国家“十三五”科学技术专著丛书1部;申请发明专利20余项。
主要研究领域
功率半导体器件与功率集成芯片,集成电路设计与制造,微电子系统设计封装与测试。
教学情况
在本科生及研究生教育教学工作中系统开设了6门课程,包括本科生教学的 4门主干专业课,分别是《固体物理与半导体物理》、《半导体物理》、《微电子器件基础》、《微电子工艺学》,以及研究生教学的2门专业基础课:《半导体功率器件》、《微电子工艺学基础》。主持省级教改-重点项目,共培养硕士研究生50余人。教学注重渔鱼兼受,立德树人,牵头获校级研究生教育教学成果二等奖和思政教学比赛三等奖,优秀班主任、阳光园丁等荣誉。
主要学术论文
[1]Lijuan Wu Deqiang Yang et al. A novel 4H-SiC IGBT with double gate PMOS for improving the switch controllability and FBSOA [J]. Microelectronics Journal,2024,147:106187.
[2]Wu, Lijuan, Guanglin Yang, Deqiang Yang, Zigui Tu, Jie Yuan, Dongsheng Zhao, Mengjiao Liu, and Jiahui Liang. Self-Clamped P-Shield 4H-SiC Trench MOSFET for Low Turn-off Loss and Suppress Switching Oscillation [J]. Microelectronics Journal,2024,151: 106307.
[3]Wu, Lijuan, Jiahui Liang, Mengyuan Zhang, et al. An Approach for Extracting the Sic/Sio2 Sic Mosfet Interface Trap Distribution and Study During Short Circuit. [J]Materials Science in Semiconductor Processing, 2023: 163.
[4]Wu, Lijuan, Mengyuan Zhang, Jiahui Liang, et al. A Low-Loss 1.2 kV SiC MOSFET with Improved UIS Performance [J].Micromachines, 2023. 14(5): 1061.
[5]Wu, Lijuan,Gang Yang,Mengjiao Liu et al.Multi-dimensional accumulation gate LDMOS with ultra-low specific on-resistance [J].Microelectronics Journal,2023,138:105860.
[6]Lijuan Wu, Mengjiao Liu, Mengyuan Zhang, et.al. Low On-State Voltage and EMI Noise 4H-SiC IGBT With Self-Biased Split-Gate pMOS[J].IEEE Transaction on Electron Device, 2023, 70(2): 647-652.
[7]Lijuan Wu, Xuanting Song, Banghui Zhang, et.al. Novel Snapback-Free Shorted-Anode SOI-LIGBT With Shallow Oxide Trench and Adaptive Electron Channel[J]. IEEE Transaction on Electron Device, 2023, 70(1): 185-190.
[8]Lijuan Wu, Tao Qiu, Xuanting Song, et al. Analytical model for high-k SOI pLDMOS with self-adaptive balance of polarization charge[J]. Microelectronics Journal, 2023, 132: 105677.
[9]Lijuan Wu, Banghui Zhang, Gaoqiang Deng, et al. A Superjunction Insulated Gate Bipolar Transistor with Embedded Self-biased N-Type Metal–Oxide–Semiconductor Field-Effect Transistor[J]. Journalof Electronic Materials, 2023: 1-8.
[10]Lijuan Wu, Qing Liu, Gaoqiang Deng, et al. Improving dynamic performance for split-gate trench power MOSFETs using variable vertical doping profile[J]. Micro and Nanostructures, 2022, 172: 207446.
[11]Lijuan Wu, Heng Liu, Xuanting Song, Xing Chen, Jinsheng Zeng, Tao Qiu, Banghui Zhang.A 4H-SiC Trench IGBT with Controllable Hole-Extracting Path for Low Loss[J]. Chinese Physics B, 2022, 32(4): 48503-048503.
[12]Lijuan Wu, Xing Chen, Jinsheng Zeng, et.al. Novel Accumulation Mode Super Junction Device with Extended Super Junction Gate[J]. IEEE Transaction on Electron Device, 2022, 69(5): 2560-2565.
[13]Lijuan Wu, Jinsheng Zeng, Xing Chen, et al. Analytical Model and Mechanism of a Linear Extended Gate for Lateral Internal Superjunction Power Devices[J]. Silicon, 2022:1-7.
[14]Lijuan Wu, Shaolian Su, Xing Chen, et al. A deep trench super-junction LDMOS with double charge compensation layer[J]. Journal of Semiconductors, 2022, 43(10): 104102.
[15]Lijuan Wu, Ye Huang, Yue Song, et al. Novel High-K SOI LDMOS with N+ Buried Layer[J]. IETE Technical Review, 2020, 39(2): 310-315.
[16]Lijuan Wu, Lin Zhu, Xing Chen et al. Variable-K double trenches SOI LDMOS with high-concentration P-pillar[J]. Chinese Physics B, 2020, 29(5): 057701.
[17]Lijuan Wu, Jiaqi Chen, Hang Yang et al. A Ultra‑Low Specifc On‑Resistance and Extended Gate SJ LDMOS Structure[J]. Transactions on Electrical and Electronic Materials, 2021, 22: 211–216.
[18]Lijuan Wu, Haifeng Wu, Jinsheng Zeng et al. A Novel LDMOS with Ultralow Specific on-Resistance and Improved Switching Performance[J]. Silicon, 2021: 1-9.
[19]Lijuan Wu, Qilin Ding, Jiaqi Chen et al. Improved Deep Trench Super junction LDMOS Breakdown Voltage By Shielded Silicon Insulator Silicon Capacitor[J]. Silicon, 2020: 1-6.
[20]Lijuan Wu, Yiqing Wu, Yinyan Zhang et al. High Voltage Lateral Double Diffused Metal Oxide Semiconductor with Double Superjunction[J].Journal of ELECTRONIC MATERIALS, 2019, 48(4): 1-7.
[21]Lijuan Wu, Yiqing Wu, Bing Lei et al. PSJ LDMOS with a VK dielectric layer[J]. Micro&Nano Letters,2019:1–4.
[22]Lijuan Wu, Ye Huang, Yiqing Wu et al. Investigation of the stepped split protection gate L-Trench SOI LDMOS with ultra-low specific on resistance by simulation[J]. Materials Science in Semiconductor Processing, 2019, 101:272-278.
[23]Lijuan Wu, Qilin Ding, Jiaqi Chen et al. A Lateral Double-Diffusion Metal Oxide Semiconductor Device with a Gradient Charge Compensation Layer[J]. Journal of ELECTRONIC MATERIALS, 2019, 48(12):7970-7976.
[24]Lijuan Wu,Yinyan Zhang,Hang Yang et al.Optimization of novel superjunction LDMOS with partial low K layer[J]. Superlattices and Microstructures, 2018, 123:226-233.
联系方式
E-mail: 305719669@qq.com
通讯地址:304am永利集团(云塘校区)物理与电子科学学院理科楼C309